dontium 发表于 2016-1-2 22:15
楼主，把你的工作拿出来，让我参考一下，也好帮你找问题
void main()
{
int i;
PLL_Init(100);
wait(29);
SDRAM_init();
AIC23_Init();
INTR_init( );
TIMER_init( );
while(1)
{
if(TIME_flag==1)
{
TIME_flag=0;
if(ID_time!=0)
{
IDENTIFICATION();
ID_time--;
}
if(ID_time==0)
{
if(ANC_flag==0)
{
ANC_flag=1;
for(i=0;i spcr1, 0);
Write(pMCBSP0 -> spcr2, 0);
// Config frame parameters (32 bit, single phase, no delay)
Write(pMCBSP0 -> xcr1, XWDLEN1_32);
Write(pMCBSP0 -> xcr2, XPHASE_SINGLE | XDATDLY_0);
Write(pMCBSP0 -> rcr1, RWDLEN1_32);
Write(pMCBSP0 -> rcr2, RPHASE_SINGLE | RDATDLY_0);
// Disable int frame generation and enable slave w/ext frame signals on FSX
// Frame sync is active high, data clocked on rising edge of clkx
Write(pMCBSP0 -> pcr, PCR_CLKXP);
// Bring transmitter and receiver out of reset
SetMask(pMCBSP0 -> spcr2, SPCR2_XRST);
SetMask(pMCBSP0 -> spcr1, SPCR1_RRST);
}
void McBSP1_InitSlave()
{
PC55XX_MCSP pMCBSP1 = (PC55XX_MCSP)C55XX_MSP1_ADDR;
// Put the MCBSP in reset
Write(pMCBSP1 -> spcr1, 0);
Write(pMCBSP1 -> spcr2, 0);
// Config frame parameters (32 bit, single phase, no delay)
Write(pMCBSP1 -> xcr1, XWDLEN1_32);
Write(pMCBSP1 -> xcr2, XPHASE_SINGLE | XDATDLY_0);
Write(pMCBSP1 -> rcr1, RWDLEN1_32);
Write(pMCBSP1 -> rcr2, RPHASE_SINGLE | RDATDLY_0);
// Disable int frame generation and enable slave w/ext frame signals on FSX
// Frame sync is active high, data clocked on rising edge of clkx
Write(pMCBSP1 -> pcr, PCR_CLKXP);
// Bring transmitter and receiver out of reset
SetMask(pMCBSP1 -> spcr2, SPCR2_XRST);
SetMask(pMCBSP1 -> spcr1, SPCR1_RRST);
}
void AIC23_Init()
{
I2C_Init();
// Reset the AIC23 and turn on all power
AIC23_Write(AIC23_RESET_REG, 0);
AIC23_Write(AIC23_POWER_DOWN_CTL, 0);
AIC23_Write(AIC23_ANALOG_AUDIO_CTL, 0x10);
AIC23_Write(AIC23_DIGITAL_AUDIO_CTL, 0);
// Turn on volume for line inputs
AIC23_Write(AIC23_LT_LINE_CTL,0x16);
AIC23_Write(AIC23_RT_LINE_CTL,0x16);
// Configure the AIC23 for master mode, 8KHz stereo, 16 bit samples
// Use 12MHz USB clock
AIC23_Write(AIC23_DIGITAL_IF_FORMAT, DIGIF_FMT_MS | DIGIF_FMT_IWL_16 | DIGIF_FMT_FOR_DSP);
AIC23_Write(AIC23_SAMPLE_RATE_CTL, SRC_SR_32 | SRC_BOSR | SRC_MO);
// Turn on headphone volume and digital interface
AIC23_Write(AIC23_LT_HP_CTL, 0x078); // 0x79 for speakers
AIC23_Write(AIC23_RT_HP_CTL, 0x078);
AIC23_Write(AIC23_DIG_IF_ACTIVATE, DIGIFACT_ACT);
// Set McBSP0 to be transmit slave
McBSP0_InitSlave();
McBSP1_InitSlave();
}
void AIC23_Disable()
{
PC55XX_MCSP pMCBSP0 = (PC55XX_MCSP)C55XX_MSP0_ADDR;
I2C_Disable();
// Put the MCBSP in reset
Write(pMCBSP0 -> spcr1, 0);
Write(pMCBSP0 -> spcr2, 0);
}
下面是I2C.c
#include "5509.h"
#include "util.h"
extern DSPCLK dspclk;
I2C_Init()
{
PC55XX_I2C pI2C = (PC55XX_I2C)C55XX_I2C_ADDR;
// Put I2C controller in reset (bad if clock derivatives change out of reset)
ClearMask(pI2C -> icmdr, ICMDR_IRS);
// Set prescaler to generate 12MHz clock
pI2C -> icpsc = dspclk.pllmult;
// Setup clock control registers (100KHz clock out)
Write(pI2C -> icclkl, 10); // For 400KHz, use 47 for 100KHz
Write(pI2C -> icclkh, 10);
// Setup master and slave addresses
WriteMask(pI2C -> icoar, ICOAR_OADDR, ICOAR_MASK_7);
// Take I2C controller out of reset, put in master mode
SetMask(pI2C -> icmdr, ICMDR_IRS | ICMDR_MST);
}
I2C_Disable()
{
PC55XX_I2C pI2C = (PC55XX_I2C)C55XX_I2C_ADDR;
// Put I2C controller in reset (bad if clock derivatives change out of reset)
ClearMask(pI2C -> icmdr, ICMDR_IRS);
}
void I2C_Write(unsigned short int device, int count, unsigned char *bytedata)
{
PC55XX_I2C pI2C = (PC55XX_I2C)C55XX_I2C_ADDR;
int i;
// Set the I2C controller to write a stream of count bytes
Write(pI2C -> iccnt, count);
WriteMask(pI2C -> icsar, device, ICSAR_MASK_7);
WriteMask(pI2C -> icmdr,
ICMDR_STT | ICMDR_STP | ICMDR_TRX,
ICMDR_STT | ICMDR_STP | ICMDR_TRX);
// Transmit data
for (i = 0; i < count ; i++) {
Write(pI2C -> icdxr, bytedata);
while(!(pI2C -> icstr & ICSTR_ICXRDY));
}
}
void I2C_Read(unsigned short int device, int count, unsigned char *bytedata)
{
PC55XX_I2C pI2C = (PC55XX_I2C)C55XX_I2C_ADDR;
int i;
// Set the I2C controller to read a stream of count bytes
Write(pI2C -> iccnt, count);
WriteMask(pI2C -> icsar, device, ICSAR_MASK_7);
WriteMask(pI2C -> icmdr,
ICMDR_STT | ICMDR_STP,
ICMDR_STT | ICMDR_STP | ICMDR_TRX);
// Receive the data
for (i = 0; i < count; i++)
{
// Wait for receive data to come back
while(!(pI2C -> icstr & ICSTR_ICRRDY));
// Copy the data out
bytedata = pI2C -> icdrr;
}
}
下面是SDRAM_init.c
void SDRAM_init( void )
{
ioport unsigned int *ebsr =(unsigned int *)0x6c00;
ioport unsigned int *egcr =(unsigned int *)0x800;
ioport unsigned int *emirst=(unsigned int *)0x801;
//ioport unsigned int *emibe =(unsigned int *)0x802;
ioport unsigned int *ce01 =(unsigned int *)0x803;
//ioport unsigned int *ce02 =(unsigned int *)0x804;
//ioport unsigned int *ce03 =(unsigned int *)0x805;
ioport unsigned int *ce11 =(unsigned int *)0x806;
//ioport unsigned int *ce12 =(unsigned int *)0x807;
//ioport unsigned int *ce13 =(unsigned int *)0x808;
ioport unsigned int *ce21 =(unsigned int *)0x809;
//ioport unsigned int *ce22 =(unsigned int *)0x80A;
//ioport unsigned int *ce23 =(unsigned int *)0x80B;
ioport unsigned int *ce31 =(unsigned int *)0x80C;
//ioport unsigned int *ce32 =(unsigned int *)0x80D;
//ioport unsigned int *ce33 =(unsigned int *)0x80E;
ioport unsigned int *sdc1 =(unsigned int *)0x80F;
//ioport unsigned int *sdper =(unsigned int *)0x810;
//ioport unsigned int *sdcnt =(unsigned int *)0x811;
ioport unsigned int *init =(unsigned int *)0x812;
ioport unsigned int *sdc2 =(unsigned int *)0x813;
*ebsr = 0x221;//0xa01
*egcr = 0x200;
*egcr = 0X220;
*ce01 = 0X3000;
*ce11 = 0X3fff;
*ce21 = 0x1fff;
*ce31 = 0x1000;
*emirst = 0;
*sdc1 = 0X5958;
*sdc2 = 0X38F;
*init = 0;
}
下面是util.c
#include "5509.h"
#include "util.h"
DSPCLK dspclk;
void PLL_Init(int freq)
{
PC55XX_CMOD pCMOD = (PC55XX_CMOD)C55XX_CLKMD_ADDR;
// Calculate PLL multiplier values (only integral multiples now)
dspclk.clkin = DSP_CLKIN;
dspclk.pllmult = freq / dspclk.clkin;
dspclk.freq = dspclk.pllmult * dspclk.clkin;
dspclk.plldiv = 0;
dspclk.nullloopclk = NULLLOOP_CLK;
// Turn the PLL off
ClearMask(pCMOD -> clkmd, CLKMD_PLLENABLE);
while(ReadMask(pCMOD -> clkmd, CLKMD_LOCK));
// Initialize PLL flags
ClearMask(pCMOD -> clkmd, CLKMD_IAI);//0x4000
SetMask(pCMOD -> clkmd, CLKMD_IOB | CLKMD_BREAKLN);//0x2000|0x0002
// Set the multiplier/divisor
WriteMask(pCMOD -> clkmd,
CLKMD_PLLDIV_1 | CLKMD_BYPASSDIV_1,
CLKMD_PLLDIV_MASK | CLKMD_BYPASSDIV_MASK);//0|0|
WriteField(pCMOD -> clkmd, dspclk.pllmult, CLKMD_PLLMULT_MASK);
// Enable the PLL and wait for lock
SetMask(pCMOD -> clkmd, CLKMD_PLLENABLE);
while(!ReadMask(pCMOD -> clkmd, CLKMD_LOCK));
}
void SWDelayUsec(unsigned int usec)
{
unsigned int i, j, loopsperusec;
loopsperusec = dspclk.freq / dspclk.nullloopclk;
for (i=0;i
DSP 与 ARM 处理器