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FPGA实现最高非零位的快速确定问题
版主还在吗?我这有一套更好的找最高非零的算法,不仅仅可以找16位的,更多位宽的也可以找,我贴一个我自己写的8位的代码。
module DetectionSequence8BitFirst1 #(
parameter LATENCY = 1
)(
input wire clk,
input wire nUsrRst,
input wire [7 :0] iData,
output logic [2 :0] oFirst1Location,
output logic oNonZeroFlag
);
logic [7 :0] data;
logic [7 :0] dataTmp0;
logic [7 :0] dataTmp1;
logic [7 :0] dataTmp2;
logic [7 :0] dataTmp3;
always_comb begin
dataTmp0 = iData - 8'd1;
dataTmp1 = ~dataTmp0;
dataTmp2 = iData & dataTmp1;
dataTmp3 = dataTmp2 - 8'd1;
end
assign oNonZeroFlag = (dataTmp3 == 8'hff) ? 1'b0 : 1'b1;
generate
if(LATENCY == 0) begin
always_comb begin
oFirst1Location = dataTmp3[0] + dataTmp3[1] + dataTmp3[2] + dataTmp3[3] + dataTmp3[4] + dataTmp3[5] + dataTmp3[6] + dataTmp3[7];
end
end
else if(LATENCY == 1) begin
always_ff @(posedge clk) begin
oFirst1Location <= dataTmp3[0] + dataTmp3[1] + dataTmp3[2] + dataTmp3[3] + dataTmp3[4] + dataTmp3[5] + dataTmp3[6] + dataTmp3[7];
end
end
endgenerate
endmodule