void SPI_DMA_Config(void)
{
/*##-3- Configure the DMA streams ##########################################*/
/* Configure the DMA handler for Transmission process */
//RCC_AHB1PeriphClockCmd(RCC_AHB1ENR_DMA1EN, ENABLE);
__DMA1_CLK_ENABLE() ;
HAL_DMA_DeInit(&hdma_tx);
hdma_tx.Instance = SPI2_TX_DMA_STREAM;
hdma_tx.Init.Channel = SPI2_TX_DMA_CHANNEL; //éèÖÃí¨μà
hdma_tx.Init.PeripheralBaseAddr = (uint32_t)SPI2_DR_Addr;//&SPI2->DR;
hdma_tx.Init.Memory0BaseAddr = (uint32_t)&LCDValue[0];
hdma_tx.Init.BufferSize = DMA_LEN; //128*64
hdma_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; //éèÖÃ′«êä·½Ïò
hdma_tx.Init.PeriphInc = DMA_PINC_DISABLE; //íaéèμØÖ·Ôöá¿
hdma_tx.Init.MemInc = DMA_MINC_ENABLE; //Äú′æμØÖ·Ôöá¿
hdma_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; //íaéè′«êä¿í′ø
hdma_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; //Äú′æ′«êä¿í′ø
hdma_tx.Init.Mode = DMA_NORMAL; //′«êä·½ê½
hdma_tx.Init.Priority = DMA_PRIORITY_LOW; //DMA_PRIORITY_HIGH; DMA_PRIORITY_MEDIUM;// //ÖD¶Ï·½ê½:¸ß
hdma_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
hdma_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
hdma_tx.Init.MemBurst = DMA_MBURST_SINGLE;//DMA_MBURST_INC4;
hdma_tx.Init.PeriphBurst = DMA_PBURST_SINGLE;//DMA_PBURST_INC4;
HAL_DMA_Init(&hdma_tx);
//
//
//
HAL_NVIC_SetPriority(SPI2_DMA_TX_IRQn, 15, 15);
HAL_NVIC_EnableIRQ(SPI2_DMA_TX_IRQn);
__HAL_DMA_ENABLE_IT(&hdma_tx, DMA_IT_TC);
SPI_I2S_DMACmd(LCD_SPI,SPI_CR2_TXDMAEN,ENABLE);
DMA_Cmd(DMA1_Stream4,ENABLE);
}
void Spi_Init(void)
{
HAL_SPI_MspInit(&Spi_InitStru);
/*##-1- Configure the SPI peripheral #######################################*/
/* Set the SPI parameters */
RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
/* Release SPI1 from reset state */
RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE);
Spi_InitStru.Instance = LCD_SPI;
Spi_InitStru.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4;
Spi_InitStru.Init.Direction = SPI_DIRECTION_2LINES;
Spi_InitStru.Init.CLKPhase = SPI_PHASE_1EDGE;
Spi_InitStru.Init.CLKPolarity = SPI_POLARITY_LOW;
Spi_InitStru.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED;
Spi_InitStru.Init.CRCPolynomial = 7;
Spi_InitStru.Init.DataSize = SPI_DATASIZE_8BIT;
Spi_InitStru.Init.FirstBit = SPI_FIRSTBIT_MSB;
Spi_InitStru.Init.NSS = SPI_NSS_SOFT;
Spi_InitStru.Init.TIMode = SPI_TIMODE_DISABLED;
Spi_InitStru.Init.Mode = SPI_MODE_MASTER;
HAL_SPI_Init(&Spi_InitStru);
//__HAL_SPI_ENABLE_IT(&Spi_InitStru,SPI_CR2_TXDMAEN);
//SPI_I2S_DMACmd(LCD_SPI,SPI_CR2_TXDMAEN,ENABLE);
__HAL_SPI_ENABLE(&Spi_InitStru);
//__HAL_SPI_ENABLE_IT();
SPI_DMA_Config();
}
uint8_t LCD_SPI_SendData(uint8_t da)
{
// while(SPI_I2S_GetFlagStatus(SPI2,SPI_I2S_FLAG_TXE)==RESET);
// SPI_I2S_SendData(SPI2,da);
//
// while(SPI_I2S_GetFlagStatus(SPI2,SPI_I2S_FLAG_RXNE)==RESET)
// ;
//
// return SPI_I2S_ReceiveData(SPI2);
while(SPI_I2S_GetFlagStatus(SPI2,SPI_I2S_FLAG_TXE)==RESET);
LCDValue[0]=da;
hdma_tx.Instance->NDTR =1;
DMA_Cmd(DMA1_Stream4,ENABLE);
//LCD_DMATXBuffer(1);
}
uint8_t LCD_SPI_SendString(uint8_t *buf,uint8_t len)
{
// memcpy(LCDValue,buf,len);
uint8_t i=0;
while(SPI_I2S_GetFlagStatus(SPI2,SPI_I2S_FLAG_TXE)==RESET);
for(i=0;iNDTR =(uint32_t) len;
DMA_Cmd(DMA1_Stream4,ENABLE);
//LCDValue[i++]=0;
//LCD_DMATXBuffer(len+1);
}
void SPI2_DMA_TX_IRQHandler()
{
/* Transfer Complete Interrupt management ***********************************/
if(__HAL_DMA_GET_FLAG(&hdma_tx, __HAL_DMA_GET_TC_FLAG_INDEX(&hdma_tx)) != RESET)
{
if(__HAL_DMA_GET_IT_SOURCE(&hdma_tx, DMA_IT_TC) != RESET)
{
if(((hdma_tx.Instance->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0)
{
/* Clear the transfer complete flag */
__HAL_DMA_CLEAR_FLAG(&hdma_tx, __HAL_DMA_GET_TC_FLAG_INDEX(&hdma_tx));
/* Current memory buffer used is Memory 1 */
if((hdma_tx.Instance->CR & DMA_SxCR_CT) == 0)
{
if(hdma_tx.XferM1CpltCallback != NULL)
{
/* Transfer complete Callback for memory1 */
hdma_tx.XferM1CpltCallback(&hdma_tx);
}
}
/* Current memory buffer used is Memory 0 */
else if((hdma_tx.Instance->CR & DMA_SxCR_CT) != 0)
{
if(hdma_tx.XferCpltCallback != NULL)
{
/* Transfer complete Callback for memory0 */
hdma_tx.XferCpltCallback(&hdma_tx);
}
}
}
/* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */
else
{
if((hdma_tx.Instance->CR & DMA_SxCR_CIRC) == 0)
{
/* Disable the transfer complete interrupt */
// __HAL_DMA_DISABLE_IT(&hdma_tx, DMA_IT_TC);
}
/* Clear the transfer complete flag */
__HAL_DMA_CLEAR_FLAG(&hdma_tx, __HAL_DMA_GET_TC_FLAG_INDEX(&hdma_tx));
/* Update error code */
hdma_tx.ErrorCode |= HAL_DMA_ERROR_NONE;
/* Change the DMA state */
hdma_tx.State = HAL_DMA_STATE_READY_MEM0;
/* Process Unlocked */
__HAL_UNLOCK(&hdma_tx);
if(hdma_tx.XferCpltCallback != NULL)
{
/* Transfer complete callback */
// hdma_tx.XferCpltCallback(&hdma_tx);
}
DMA_Cmd(DMA1_Stream4,DISABLE);
}
}
}
}
stm32/stm8