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    1. 常用半导体器件讲解

      标签：常用半导体器件

      华大半导体181页PPT基础知识培训——常用半导体器件讲解

      下载次数 10次 资源类型 应用文档 上传时间 2023-07-21

    2. Advanced Flip Chip Packaging

      标签：封装 Bumping Underfill BGA

      详细介绍了FC技术，bumping技术，underfill技术和substrate技术，以及倒装封装芯片的热设计，机械应力等可靠性设计

      下载次数 1次 资源类型 应用文档 上传时间 2023-07-14

    3. Area-I/O Flip-Chip Routing for Chip-Package Co-Design

      标签：芯片封装

      The area-I/O flip-chip package provides a high chip-density solution to the demand of more I/O’s in VLSI designs; it can achieve smaller package size, shorter wirelength, and better signal and power integrity. In this paper, we introduce the routing problem for chip and package co-design and present the first work in the literature to handle the multiple Re-Distribution Layer (RDL) routing problem for flip-chip designs, considering pin and layer assignment, total wirelength minimization, and chip-package co-design. Our router adopts a two-stage technique of global routing followed by RDL routing. The global routing assigns each block port to a unique bump pad via an I/O pad and decides the RDL routing among I/O pads and bump pads. Based on the minimum-cost maximumflow algorithm, we can guarantee 100% RDL routing completion after the assignment and the optimal solution with the minimum wirelength. The RDL routing efficiently distributes the routing points between two adjacent bump pads and then generates a 100% routable sequence to complete the routing. Experimental results based on 10 industry designs demonstrate that our router can achieve 100% routability and the optimal routing wirelength under reasonable CPU times, while related works cannot.

      下载次数 0次 资源类型 学术论文 上传时间 2023-07-14

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