730 static int au1xmmc_prepare_data(struct au1xmmc_host *host,
731 struct mmc_data *data)
732 {
733 int datalen = data->blocks * data->blksz;
734
735 if (data->flags & MMC_DATA_READ)
736 host->flags |= HOST_F_RECV;
737 else
738 host->flags |= HOST_F_XMIT;
739
740 if (host->mrq->stop)
741 host->flags |= HOST_F_STOP;
742
743 host->dma.dir = DMA_BIDIRECTIONAL;
744
745 host->dma.len = dma_map_sg(mmc_dev(host->mmc), data->sg,
746 data->sg_len, host->dma.dir);
747
748 if (host->dma.len == 0)
749 return -ETIMEDOUT;
750
751 //au_writel(data->blksz - 1, HOST_BLKSIZE(host));
752
753 if (host->flags & HOST_F_DMA) {
754 #if defined(CONFIG_SOC_AU1200) || defined(CONFIG_SOC_AU13XX) /* DBDMA */
755 int i;
756 u32 channel = DMA_CHANNEL(host);
757
758 au1xxx_dbdma_stop(channel);
759
760 for (i = 0; i < host->dma.len; i++) {
761 u32 ret = 0, flags = DDMA_FLAGS_NOIE;
762 struct scatterlist *sg = &data->sg;
763 int sg_len = sg->length;
764
765 int len = (datalen > sg_len) ? sg_len : datalen;
766
767 if (i == host->dma.len - 1)
768 flags = DDMA_FLAGS_IE;
769
770 if (host->flags & HOST_F_XMIT) {//当发送数据的时候把数据推到DMA写buffer里。这个地方很大可能你有问题。
771 ret = au1xxx_dbdma_put_source_flags(channel,
772 (void *)sg_virt(sg), len, flags);
774 } else {
775 ret = au1xxx_dbdma_put_dest_flags(channel,
776 (void *)sg_virt(sg), len, flags);
777 }
778
779 if (!ret)
780 goto dataerr;
781
782 datalen -= len;
783 }
784 #endif
785 } else {
786 host->pio.index = 0;
787 host->pio.offset = 0;
788 host->pio.len = datalen;
789
790 if (host->flags & HOST_F_XMIT)
791 IRQ_ON(host, SD_CONFIG_TH);
792 else
793 IRQ_ON(host, SD_CONFIG_NE);
794 /* IRQ_ON(host, SD_CONFIG_RA | SD_CONFIG_RF); */
795 }
796
797 return 0;
245 static int au1xmmc_send_command(struct au1xmmc_host *host, int wait,
246 struct mmc_command *cmd, struct mmc_data *data)
247 {
248 u32 mmccmd = (cmd->opcode opcode == SD_IO_RW_EXTENDED) || (cmd->opcode == SD_IO_RW_DIRECT))
260 mmccmd |= SD_CMD_RT_5;
261 else
262 mmccmd |= SD_CMD_RT_1;
263 break;
264 case MMC_RSP_R1B:
265 mmccmd |= SD_CMD_RT_1B;
266 break;
267 case MMC_RSP_R2:
268 mmccmd |= SD_CMD_RT_2;
269 break;
270 case MMC_RSP_R3:
271 mmccmd |= SD_CMD_RT_3;
272 break;
273 default:
274 printk(KERN_INFO "au1xmmc: unhandled response type %02x\n",
275 mmc_resp_type(cmd));
276 return -EINVAL;
277 }
278
279 if (data) {
280 if (cmd->opcode == SD_IO_RW_EXTENDED) {
281 if (IO_RW_EXTENDED_BLOCK_MODE(cmd->arg)) {
282 if (0 == IO_RW_EXTENDED_COUNT(cmd->arg)) {
283 if (data->flags & MMC_DATA_WRITE)
284 mmccmd |= SD_CMD_CT_3;
285 else
286 mmccmd |= SD_CMD_CT_4;
287 }
288 else {
289 if (data->flags & MMC_DATA_WRITE)
290 mmccmd |= SD_CMD_CT_5;
291 else
292 mmccmd |= SD_CMD_CT_6;
293 }
294 }
295 else {
296 if (data->flags & MMC_DATA_WRITE)
297 mmccmd |= SD_CMD_CT_1;
298 else
299 mmccmd |= SD_CMD_CT_2;
300 }
301 }
302 else {
303 if (data->flags & MMC_DATA_WRITE) {
304 if (data->blocks > 1) {
305 mmccmd |= SD_CMD_CT_3;
306 }
307 else
308 mmccmd |= SD_CMD_CT_1;
309 } else {
310 if (data->blocks > 1) {
311 mmccmd |= SD_CMD_CT_4;
312 }
313 else
314 mmccmd |= SD_CMD_CT_2;
315 }
316
317 }
318 }
319 else if ((cmd->opcode == SD_IO_RW_DIRECT) &&
320 (SDIO_CCCR_ABORT == IO_RW_DIRECT_ADDR_ARG(cmd->arg))) {
321 mmccmd |= SD_CMD_CT_8;
322 IOAbort = 1;
323 }
324 //printk("data->flags=%08x\n",data->flags);
325 // printk("cmd->opcode=%d\n",cmd->opcode);
326 if (( MMC_STOP_TRANSMISSION != cmd->opcode) && (!IOAbort)) {
327 //if the previous command is command 53 and the data busy bit is on,
328 // there is a chance that the clock may be frozen. Set DF to 1 to get
329 // the clock back.
330 if (lastCmd53 && (au_readl(HOST_STATUS(host)) & SD_STATUS_DB )) {
331 // printk("Set DF to 1 to get\n");
332 tmp = au_readl(HOST_CONFIG2(host));
333 tmp |= SD_CONFIG2_DF;
334 au_writel(tmp , HOST_CONFIG2(host));
335 }
336 i = 0;
337 while(i < HOSTCMD_TIMEOUT) {
338 if (!((au_readl(HOST_STATUS(host))) & SD_STATUS_DB)) {
339 break;
340 }
341 au_sync_udelay(100);
342 i++;
343 }
344 if (i == HOSTCMD_TIMEOUT) {
345 printk("Clock frozen. DB bit not cleared !!!");
346 return -1;
347 }
348 }
349
stm32/stm8