前面完成BeagleBone从Nand Flash的启动，之后花了一段时间试验BeagleBone GPMC读写外部存储器，针对BeagleBone的GPMC接口扩展一块FPGA板子，基本功能就是在FPGA里做一个双口RAM，BeagleBone GPMC实现对双口RAM的读写操作。当然，FPGA外挂高速AD及DA，完成GPMC读写双口RAM的功能后完全可以做基于ARM+FPGA的高速数据采集及DDS波形发生器。
本文的思路主要参考一下这篇帖子：
1、TI GPMC 简要说明
通用存储器控制，即用来访问外部存储器的。主要参考下《AM335x ARM ® Cortex™-A8 Microprocessors(MPUs) TechnicalReferenceManual 》该文档的7.1 GPMC。
支持的外部存储器说明：
存储器类型：NORFlashlike,asynchronous and synchronous devices或者NAND Flashlike devices,stream mode
数据总线宽度：8-bits或者16-bits
地址数据总线复用情况：non-multiplexed/AD/AAD（AAD没见过）
同步和异步区别在于：同步需要时钟信号，异步不需要时钟信号，具体自己去体会哈。
GPMC读支持single access及multiple access(burst if synchonous,pageifasynchronous)
，写支持Single access及Multipleaccess(burstifsynchronous,considered as singleifasynchronous) ，
目前Multipleaccess还没弄明白。
由于需要用GPMC读写FPGA 双口RAM，所以采用synchonous single access NOR Flashlike 16bit模式，其硬件连接示意图如下：图1：GPMC读写FPGA 双口RAM硬件连接示意图
2、试验过程
（1）BeagleBone通过GPMC接口读写FPGA做的双口单时钟（读写时钟共用GPMC时钟）RAM。
（2）高速数据采集：FPGA控制高速AD ，FPGA做的双口双时钟（读写时钟分开）RAM作为AD数据缓存，GPMC时钟用作RAM读时钟，FPGA PLL输出时钟作高速AD采样时钟及写RAM时钟；
（3）DDS波形发生器，目前DDS还没有开始做。
简单完成BeagleBone通过GPMC写双口双时钟（读写时钟分开）RAM，即将高速DA需要的数据预存在RAM里，FPGA PLL输出时钟作高速DA时钟及读RAM时钟，FPGA读RAM预存的数据送到高速DA实现固定频率波形产生。
3、GPMC实现
（1）Linux板文件里初始化GPMC相关管脚
板文件路径：/root/bone-linux/arch/arm/mach-omap2
/root/bone-linux/ 改成自己的ARM Linux源码目录
相关代码：
[code]/* Pin mux for fpga module */
static struct pinmux_config fpga_pin_mux[] = {
{\"gpmc_ad0.gpmc_ad0\", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
{\"gpmc_ad1.gpmc_ad1\", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
{\"gpmc_ad2.gpmc_ad2\", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
{\"gpmc_ad3.gpmc_ad3\", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
{\"gpmc_ad4.gpmc_ad4\", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
{\"gpmc_ad5.gpmc_ad5\", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
{\"gpmc_ad6.gpmc_ad6\", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
{\"gpmc_ad7.gpmc_ad7\", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
{\"gpmc_ad8.gpmc_ad8\", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
{\"gpmc_ad9.gpmc_ad9\", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
{\"gpmc_ad10.gpmc_ad10\", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
{\"gpmc_ad11.gpmc_ad11\", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
{\"gpmc_ad12.gpmc_ad12\", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
{\"gpmc_ad13.gpmc_ad13\", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
{\"gpmc_ad14.gpmc_ad14\", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
{\"gpmc_ad15.gpmc_ad15\", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
{\"lcd_data0.gpmc_a0\", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{\"lcd_data1.gpmc_a1\", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{\"lcd_data2.gpmc_a2\", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{\"lcd_data3.gpmc_a3\", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{\"lcd_data4.gpmc_a4\", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{\"lcd_data5.gpmc_a5\", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{\"lcd_data6.gpmc_a6\", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{\"lcd_data7.gpmc_a7\", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{\"lcd_vsync.gpmc_a8\", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{\"lcd_hsync.gpmc_a9\", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{\"lcd_pclk.gpmc_a10\", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{\"lcd_ac_bias_en.gpmc_a11\", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{\"lcd_data8.gpmc_a12\", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{\"lcd_data9.gpmc_a13\", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{\"lcd_data10.gpmc_a14\", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{\"lcd_data11.gpmc_a15\", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
// {\"gpmc_wait0.gpmc_wait0\", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
// {\"gpmc_wpn.gpmc_wpn\", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
// {\"gpmc_csn0.gpmc_csn0\", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
{\"gpmc_csn0.gpio1_29\", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
{\"gpmc_csn1.gpmc_csn1\", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
//{\"gpmc_csn1.gpio1_30\", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
// {\"gpmc_csn2.gpmc_csn2\", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
{\"gpmc_csn2.gpio1_31\", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
// {\"gpmc_advn_ale.gpmc_advn_ale\", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
{\"gpmc_oen_ren.gpmc_oen_ren\", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
{\"gpmc_wen.gpmc_wen\", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
// {\"gpmc_ben0_cle.gpmc_ben0_cle\", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
{\"gpmc_clk.gpmc_clk\", OMAP_MUX_MODE0 | AM33XX_PULL_DISA |
AM33XX_INPUT_EN},
{NULL, 0},
};[/code]
特别注意GPMC_CLK的AM33XX_INPUT_EN属性的配置，未知管脚需要到文件mux33xx.c下修改相关内容。csn1作片选，csn0、2作GPIO用。
（2）GPMC驱动设计
主要参考内核源代码里的gpmc.c以及gpmc.h文件，内核里是platform平台驱动，我改成了最基础的字符设备驱动，水平有限。
源码文件见附件：附件1：GPMC驱动源码
（3）读写应用程序编写
源码文件见附件：附件2：读写应用程序源码
4、FPGA端程序设计
（1）FPGA与BeagleBone的连接图如下：图2：FPGA与BeagleBone的连接图
（2）FPGA原理图输入截图如下：图3：FPGA原理图输入截图
（3）FPGA管脚配置TCL文件相关部分：
[code]set_location_assignment PIN_118 -to GPMC_A[1]
set_location_assignment PIN_113 -to GPMC_A[2]
set_location_assignment PIN_114 -to GPMC_A[3]
set_location_assignment PIN_104 -to GPMC_A[4]
set_location_assignment PIN_112 -to GPMC_A[5]
set_location_assignment PIN_101 -to GPMC_A[6]
set_location_assignment PIN_103 -to GPMC_A[7]
set_location_assignment PIN_87 -to GPMC_A[8]
set_location_assignment PIN_81 -to GPMC_AD[0]
set_location_assignment PIN_80 -to GPMC_AD[1]
set_location_assignment PIN_57 -to GPMC_AD[2]
set_location_assignment PIN_58 -to GPMC_AD[3]
set_location_assignment PIN_79 -to GPMC_AD[4]
set_location_assignment PIN_76 -to GPMC_AD[5]
set_location_assignment PIN_53 -to GPMC_AD[6]
set_location_assignment PIN_55 -to GPMC_AD[7]
set_location_assignment PIN_73 -to GPMC_AD[8]
set_location_assignment PIN_65 -to GPMC_AD[9]
set_location_assignment PIN_67 -to GPMC_AD[10]
set_location_assignment PIN_71 -to GPMC_AD[11]
set_location_assignment PIN_64 -to GPMC_AD[12]
set_location_assignment PIN_63 -to GPMC_AD[13]
set_location_assignment PIN_70 -to GPMC_AD[14]
set_location_assignment PIN_69 -to GPMC_AD[15]
set_location_assignment PIN_72 -to GPMC_CLK
set_location_assignment PIN_75 -to GPMC_CSN
set_location_assignment PIN_59 -to GPMC_OEN_REN
set_location_assignment PIN_60 -to GPMC_WEN
[/code]
5、BeagleBone通过GPMC接口读写FPGA做的双口单时钟（读写时钟共用GPMC时钟）RAM SignalTapII抓图：
图4：GPMC-Read
图5：GPMC-Write
AD及DA原理图见附件3：adc和附件4：dac，软件部分上面搞定了，这个也不难，后续需要根据具体应用进行深入。
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本帖最后由 黑非拉 于 2013-12-12 11:12 编辑 ]
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