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（1.8）
Unfortunately, the whole gain chain and various impedances will affect this value. With a few lines of algebra, we can write the static output voltage definition (again, s=0) simply by following the meshes:
The static error on the output, actually the deviation between what we really want and what we finally obtain, is derived by subtracting the Vout expression [Eq. (1-10)] from Eq. (1-8):
If we consider Rs,OL<< Rload, then Eq. (1-11) simplifies to
which equals zero if
From this equation, we can see that increasing the dc gain, G(0), helps diminish the static error which finally affects our output voltage precision.Another important parameter influenced by the loop gain is the closed-loop output impedance. The output impedance of a system can be derived in different manners. As Fig. 1-4b has shown, our closed-loop generator can now be reduced to its Thévenin equivalent, that is, a voltage source Vth[Vout measured without any load, or Rload=∞ in Eq. (1-10)], followed by an output impedance Rs,CL, which we actually look for. One option consists of calculating a resistor RLX which, once wired between the output and ground, will reduce Vout=Vth to Vout=Vth/2 When this occurs, RLX simply equals Rs,CL(we have built a simple resistive divider with equal resistors). We can quickly manipulate Eq. (1-10), assuming Rload=∞: Vth/2=Vout(RLX) or “What value of RLX will divide the Thévenin voltage by 2?”
If we call the staticloop gain T, then the closed-loop output impedance is
Equation (1-14) teaches us different things :
1. If we have a large dc loop gain T(0), then Rs,CL is close to zero.
2. Because we have compensated the feedback return path G(s) for stability purposes, when the loop gain T(s) reduces as the frequency increases, Rs,CL starts to rise: an impedance whose module grows with frequency looks like an inductance! We will come back to this result later.
3. When the loop gain T(s) has dropped to zero, then the system exhibits an output impedance that is the same as in the lack of feedback, Rs,OL: the system runs open-loop.
In this example, we purposely did not account for an input voltage perturbation. This assumption is valid for bipolar transistors as the weak influence of the Early effect makes them good current generators, almost independent from their Vce variations. However, when Vout and Vin are close to each other, the transistor becomes a closed switch rather than a current source! Therefore, the input voltage starts to play a role. Let us redraw the Fig. 1-5 sketch, including the input voltage contribution. As drawn in Fig. 1-6, the term krepresents the open-loop audio susceptibility, denoted As,OL. It represents the input voltage contribution to the output, also called input ripple rejection.
Let’s now write the mesh equations as we did previously:
Again, operating with a large dc gain ensures an excellent rejection of the input voltage ripple (100 or 120 Hz for full-wave rectification). When T(s) reduces in the high-frequency domain,the system runs open-loop. Please note that we purposely selected a positive polarity for k, but a negative value could also have been chosen. It actually depends on the topology under study.
