/******************
External 8 MHz ************************************/
/******************
HCLK 72 MHz ************************************/
/******************
PCLK1 36 MHz ************************************/
/******************
PCLK2 72 MHz ************************************/
static void
RCC_Config(void) {
/* RCC system
reset(for debug purpose) */ RCC_DeInit();
/* Enable HSE
*/ RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is
ready */ HSEStartUpStatus = RCC_WaitForHSEStartUp();
if
(HSEStartUpStatus == SUCCESS) { /* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait
state */ FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK
*/ RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK
*/ RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2
*/ RCC_PCLK1Config(RCC_HCLK_Div2);
/* ADCCLK =
PCLK2/6 */ RCC_ADCCLKConfig(RCC_PCLK2_Div6);
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
/* Enable PLL
*/ RCC_PLLCmd(ENABLE);
/* Wait till PLL
is ready */ while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{}
/* Select PLL as
system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL
is used as system clock source */ while (RCC_GetSYSCLKSource() !=
0x08) {} } }
//#define
TEST_16BITS_FILTER
/*
MailBox
:
Ext_Frame :
EXID[28:21] || EXID[20:18] & EXID[17:13] || EXID[12:5] || EXID[4:0] &
IDE & RTR & 0 Std_Frame : STID[10:3] ||
STID[2:0] & IDE & RTR &
0
CAN Core check ID and
Mask Field by Msg.IDE
if (IDE == 0)
only Check : STID[10:3 ] || STID[2:0] with ID and Mask else //if (IDE ==
1) Check All : EXID[28:21] || EXID[20:18] & EXID[17:13] || EXID[12:5]
|| EXID[4:0] with ID and Mask
------------------------------------------------------------------------------------------------------ 32
Bits Width
Mode: ------------------------------------------------------------------------------------------------------ FR1
= ID FR2 = ID or Mask
EXT_FRAME :
EXID[28:21] || EXID[20:18] & EXID[17:13] || EXID[12:5] || EXID[4:0] &
IDE & RTR & 0 : [----------------------- ID and Mask Check
Filed -------------------] : 29 Bits
---------------------------------------------------------EXID + IDE +
RTR
STD_FRAME : STID[10:3
] || STID[2:0] & || || & IDE &
RTR & 0 : [ID and Mask Check Filed] : 11 Bits
-------------STID + IDE +
RTR
------------------------------------------------------------------------------------------------------ 16
Bits Width
Mode: ------------------------------------------------------------------------------------------------------
FR1.High = ID,
FR1.Low = ID or Mask FR2.High = ID, FR1.Low = ID or Mask
16 Bits :
EXID[28:21] || EXID[20:18] & RTR & IDE & EXID[17 : 15]
EXT_FRAME : EXID[28:21] || EXID[20:18] EXID[17 : 15]
: [ID and Mask Check Filed ] [Check Filed]
16 Bits :
STID[10:3] || STID[2:0] & RTR & IDE STD_FRAME : STID[10:3] ||
STID[2:0] & RTR & IDE : [ID and Mask Check
Filed] : 11 Bits -------------STID
*/
typedef enum {FAILED
= 0, PASSED = !FAILED} TestStatus; TestStatus CAN_Polling(void);
/******************************************************************************* *
Function Name : CAN_Polling * Description : Configures the CAN and
transmit and receive by polling * Input : None * Output :
None * Return : PASSED if the reception is well done, FAILED in other
case *******************************************************************************/ TestStatus
CAN_Polling(void) { GPIO_InitTypeDef GPIO_InitStructure;
CAN_InitTypeDef CAN_InitStructure; CAN_FilterInitTypeDef
CAN_FilterInitStructure; CanTxMsg TxMessage; CanRxMsg RxMessage;
u32 i = 0; u8 TransmitMailbox;
/* CAN Periph clock
enable */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_CAN, ENABLE);
/* Enable the CAN
pins remap to PD0/PD1 */
GPIO_PinRemapConfig(GPIO_Remap2_CAN,ENABLE);
/* Configure CAN
pin: RX */ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU; GPIO_Init(GPIOD,
&GPIO_InitStructure);
/* Configure CAN
pin: TX */ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_Init(GPIOD,
&GPIO_InitStructure);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_AFIO ,
ENABLE); /* CAN register init */ CAN_DeInit();
CAN_StructInit(&CAN_InitStructure);
/* CAN cell init
*/ CAN_InitStructure.CAN_TTCM=DISABLE;
CAN_InitStructure.CAN_ABOM=DISABLE;
CAN_InitStructure.CAN_AWUM=DISABLE;
CAN_InitStructure.CAN_NART=DISABLE;
CAN_InitStructure.CAN_RFLM=DISABLE;
CAN_InitStructure.CAN_TXFP=DISABLE;
CAN_InitStructure.CAN_Mode=CAN_Mode_LoopBack;
//CAN_InitStructure.CAN_Mode=CAN_Mode_Normal;
//CAN_InitStructure.CAN_SJW=CAN_SJW_1tq;
//CAN_InitStructure.CAN_BS1=CAN_BS1_8tq;
//CAN_InitStructure.CAN_BS2=CAN_BS2_7tq;
//CAN_InitStructure.CAN_Prescaler=5; //72MHz/2=36MHz=PCLK1 / 5 =>
7200KHz / (1+8+7) => 450KHz
CAN_InitStructure.CAN_SJW=CAN_SJW_1tq;
CAN_InitStructure.CAN_BS1=CAN_BS1_10tq;
CAN_InitStructure.CAN_BS2=CAN_BS2_7tq;
CAN_InitStructure.CAN_Prescaler=4; //72MHz/2=36MHz=PCLK1 / 4 =>
9000KHz / (1+10+7) => 500KHz
//CAN_InitStructure.CAN_SJW=CAN_SJW_1tq;
//CAN_InitStructure.CAN_BS1=CAN_BS1_10tq;
//CAN_InitStructure.CAN_BS2=CAN_BS2_7tq;
//CAN_InitStructure.CAN_Prescaler=2; //72MHz/2=36MHz=PCLK1 / 2 =>
18000KHz / (1+10+7) => 1000KHz
CAN_Init(&CAN_InitStructure);
/* transmit */
TxMessage.RTR=CAN_RTR_DATA; TxMessage.DLC=8;
TxMessage.Data[0]=0x01; TxMessage.Data[1]=0x23;
TxMessage.Data[2]=0x45; TxMessage.Data[3]=0x67;
TxMessage.Data[4]=0x89; TxMessage.Data[5]=0xAB;
TxMessage.Data[6]=0xCD; TxMessage.Data[7]=0xEF; #ifdef
TEST_16BITS_FILTER
for (i=0; i<3;
i++) { /* CAN filter init */
CAN_FilterInitStructure.CAN_FilterNumber=i;
CAN_FilterInitStructure.CAN_FilterMode=CAN_FilterMode_IdMask;
CAN_FilterInitStructure.CAN_FilterScale=CAN_FilterScale_16bit;
CAN_FilterInitStructure.CAN_FilterIdLow = 0xFFE7;
CAN_FilterInitStructure.CAN_FilterMaskIdLow=0xFFE7;
CAN_FilterInitStructure.CAN_FilterIdHigh= 0xFFE7;
CAN_FilterInitStructure.CAN_FilterMaskIdHigh=0xFFE7;
CAN_FilterInitStructure.CAN_FilterFIFOAssignment=0; //0x0320 -- Tacho
CAN_FilterInitStructure.CAN_FilterActivation=ENABLE;
CAN_FilterInit(&CAN_FilterInitStructure); } /* transmit
*/ TxMessage.IDE=CAN_ID_EXT;
TxMessage.ExtId=0x1FFF8000; //Passed
TransmitMailbox=CAN_Transmit(&TxMessage);
TxMessage.ExtId=0x0FFF800; //Not Passed
TransmitMailbox=CAN_Transmit(&TxMessage);
TxMessage.ExtId=0x1FFF8001; //Passed
TransmitMailbox=CAN_Transmit(&TxMessage);
TxMessage.ExtId=0x1FFF0000; //Not Passed
TransmitMailbox=CAN_Transmit(&TxMessage);
TxMessage.IDE=CAN_ID_STD;
TxMessage.StdId=0x7FF; //Passed
TransmitMailbox=CAN_Transmit(&TxMessage);
TxMessage.StdId=0x3FF; //Not Passed
TransmitMailbox=CAN_Transmit(&TxMessage);
TxMessage.StdId=0x7FE; //Not Passed
TransmitMailbox=CAN_Transmit(&TxMessage); #else for
(i=0; i<7; i++) { /* CAN filter init */
CAN_FilterInitStructure.CAN_FilterNumber=i;
CAN_FilterInitStructure.CAN_FilterMode=CAN_FilterMode_IdMask;
CAN_FilterInitStructure.CAN_FilterScale=CAN_FilterScale_32bit;
CAN_FilterInitStructure.CAN_FilterIdHigh= ( (0x1FFFFFFF << 3) >>
16); CAN_FilterInitStructure.CAN_FilterIdLow = ( (0x1FFFFFFF << 3)
& 0xFFFF);
CAN_FilterInitStructure.CAN_FilterMaskIdHigh=0xFFFF;
CAN_FilterInitStructure.CAN_FilterMaskIdLow=0xFFF8;
CAN_FilterInitStructure.CAN_FilterFIFOAssignment=0;
CAN_FilterInitStructure.CAN_FilterActivation=ENABLE;
CAN_FilterInit(&CAN_FilterInitStructure); } /* transmit
*/ TxMessage.IDE=CAN_ID_EXT;
TxMessage.ExtId=0x1FFFFFFF; //Passed
TransmitMailbox=CAN_Transmit(&TxMessage);
TxMessage.ExtId=0x1FFFFFFE; //Not Passed
TransmitMailbox=CAN_Transmit(&TxMessage);
TxMessage.ExtId=0x0FFFFFFF; //Not Passed
TransmitMailbox=CAN_Transmit(&TxMessage);
TxMessage.IDE=CAN_ID_STD; TxMessage.StdId=0x7FF;
//Passed TransmitMailbox=CAN_Transmit(&TxMessage);
TxMessage.StdId=0x3FF; //Not Passed
TransmitMailbox=CAN_Transmit(&TxMessage);
TxMessage.StdId=0x7FE; //Not Passed
TransmitMailbox=CAN_Transmit(&TxMessage); #endif /*
receive */ while (CAN_MessagePending(CAN_FIFO0))
CAN_Receive(CAN_FIFO0, &RxMessage);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_CAN, DISABLE); return PASSED; /* Test
Passed */ }
|