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GPIO_DIR GPIO Data Direction Register These bits are set and cleared by software to configure the corresponding GPIO pin to be an input or an output. All bits are cleared by a reset. Therefore, the GPIO pins are input by default. 0: Input 1: Output GPIO_SEL GPIO Mode Control Register These bits are set an cleared by software. All bits are cleared by a reset. Therefore, the GPIO pins are GPIO mode by default. 0: GPIO mode (for general purpose I/O) 1: Reserved Note: This bit must be ‘0’ when GPIO is used. GPIO_DATA GPIO Data Register Values written in the GPIO_DATA register are transferred onto the GPIO pins if the respective pins have been configured as outputs through the GPIO_DIR register and Alternate Function 1 is configured in the SCU_GPIOOUT register. 看起来如果要把数据发送到端口引脚: 1. GPIO_DIR : 1 : GPIO as Output 2. SCU_GPIOOUT : 01 : Alternate Function 1 In order to write to GPIO_DATA, the corresponding bits in the mask, resulting from the from bits [9:2] of the address offset, must be HIGH. Otherwise the bit values remain unchanged by the write. Similarly, the values read from this register are determined for each bit, by the mask bit derived from bits [9:2] of the address offset used to access the data register. Bits that are 1 in the address mask cause the corresponding bits in GPIO_DATA to be read, and bits that are 0 in the address mask cause the corresponding bits in GPIO_DATA to be read as 0, regardless of their value. A read from GPIO_DATA returns the last bit value written if the respective pins are configured as output, or it returns the value on the corresponding input pin when these are configured as inputs. All bits are cleared by a reset. 看起来, 读取GPIO_DATA时: 1. 读取到输出锁存器的值 : GPIO 作为输出 2. 读取GPIO的引脚状态 : GPIO 作为输人 System control unit GPIO registers GPIO Pins on P0 thru P7 have multiple input and output alternate functions. You select these using the System Control Unit (SCU)registers. GPIO output register (SCU_GPIOOUTn) Reset value: 0000 0000 0000 0000 Pn.[7:0]OUT[1:0]: GPIO Port Output Control bits 00: Input mode <-- Default Mode 01: Alternate Output 1 (general purpose output) 10: Alternate Output 2 11: Alternate Output 3 SCU registers are also used to select open collector or Push-Pull operation GPIO type register (SCU_GPIOTYPEm) TYPE[7:0]: GPIO output type register These bits are set and cleared by software to configure the corresponding GPIO pin output type. All bits are cleared by a reset, so the GPIO pins are push-pull by default. 0: Push-pull 1: Open collector and to configure Port 4 pins for use as analog inputs. GPIO analog mode register (SCU_GPIOANA) P4[7:0]A: GPIO Port 4 Analog Control bits These bits are set and cleared by software to configure the corresponding GPIO port 4 pin in analog mode. When you use analog mode, clear the corresponding bits in the SCU_GPIOINn and SCU_GPIOUTn registers. 0: Analog mode off 1: Analog mode on GPIO Pins on P8 thru P9 are only multiplexed with EMI and have no SCU output or input control registers. GPIO external memory interface register (SCU_EMI) GPIOEMI: GPIO EMI selection This bit is set and cleared by software to configure Port 8 and 9 to the EMI block. It is cleared by a reset. Therefore, the external memory bus is disabled by default. 0: Port 8 and 9 used for general purpose I/O 1: Port 8 and 9 connected to EMI block All ports have SCU_GPIOTYPE registers for selecting Open Collector or Push/Pull configuration. GPIO type register (SCU_GPIOTYPEm) TYPE[7:0]: GPIO output type register These bits are set and cleared by software to configure the corresponding GPIO pin output type. All bits are cleared by a reset, so the GPIO pins are push-pull by default. 0: Push-pull 1: Open collector GPIO input register (SCU_GPIOINn) Pn.[7:0]IN: GPIO Port Input Control bits 0: On-chip peripheral not connected to the input 1: On-chip peripheral connected to the input (Alternate input 1) Note: If a peripheral has the same input on multiple pins, do not enable more than one pin.
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