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The CPU executes
code from SRAM through AHB even if the DTCM is enabled.
But the transfer of data can be done either
from AHB or from DTCM (which is faster).
When the DTCM is disabled, all accesses to its address space go to AHB. When enabled, the DTCM must be programmed before use.
Concerning the PFQ feature, it will be enabled in the next release of “init.s” file. |