Dear All,
国内知名IC设计公司急聘SOC Design Engineer!!!工作地点：上海，欢迎投递简历至：
Jessicawu2308@hotmail.com或加qq:931297119进行咨询
薪资20-35w,具体可谈，JD如下：
JOB RESPONSIBILITIES
Reporting to SoC design manager, IC design engineer plays an active role in the Set-Top-Box SoC front-end design team. With the adoption of more advanced deep-submicron technology node, the importance of developing high quality top level design becomes even more crucial to the entire implementation flow than ever before. And the efficiency of top level integration of hundreds of in-house/3rd party IPs is now a major challenge to the project execution and time-to-market. IC design engineer is responsible for developing and implementing state-of-art methodology to automate the integration process, as well as architecting and coding for the top level design blocks to meet complex logical and physical requirements.
Responsibilities:
- Top level RTL design, including clock / reset / interrupt units, IO logic, debug and trace, low-power control, etc.
- SoC integration, relevant tool and flow development.
- To participate in logic synthesis and timing fix when needed
Qualifications:
- BS/MS degree with minimum 3+ years experience in ASIC design related positions is a must
- Solid Verilog RTL coding skills plus good understanding of clock, reset, sync/async interface, timing, etc. Experience in clock/PLL control units, pinout muxing, periphral/interface IP design is highly preferred.
- Pratical experience in Perl programming
- Knowledge of ASIC design implementation flow, and SoC reuse methodologies
- Read/write emails/documents in English should not be a problem
Optional:
- Experience in synthesis / Formal / STA is a plus
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